Wednesday, March 8, 2017

T11/6522


 The T-11 chip (code named"Tiny" at DEC) was a middlin' complete implementation of a PDP11 system on a single chip. It was designed to be used in embedded systems, controllers and the like. 


  I've been using handbuilt single board systems here to control assorted projects. Unlike most electronics hobbyists, I don't use Arduinos or Raspberry PIs - things are retro here. I like to say that my gear is all state of the art - for 1980. Typically I had been using Motorola 6802 CPUs+RAM, an EPROM and a Rockwell 6522 chip to handle IO. These have been working out pretty well, but were very limited by the 100 bytes or so of RAM available in the 6802. It occurred to me that going forward, with just an additional chip or two, I could build a T-11 based controller, that had plenty of RAM and could be programmed in MACRO-11, a language I had decades of experience using. And, it would still be deliciously retro.

 A little browsing found the work of Pete McCollum. A goodly while back Pete McCollum designed and built an impressive one board PDP11 system based on the T-11. His design showed how to make a minimal 8 bit static memory system that avoided the complication that a full 16 bit dynamic memory system would have entailed. For me, the most valuable part of his project was that it made clear how to use the RAS and CAS T11 lines. I designed a similar board that was customized to my needs. 


DEC T11 CPU
27C256 32KB EPROM
62256 32KB static RAM (only 24 KB is decoded and used)
Rockwell 6522 VIA chip - 16 bits of I/O, two timers, a shift register and four handshaking lines.

    Memory map
                 0000-1FFF - RAM
                 2000-3FFF - RAM
                 4000-5FFF - RAM
                 6000-7FFF - RAM
                 8000-9FFF - ROM Start Address = 8000
                 A000-BFFF- ROM
                 C000-DFFF- ROM
                 E000-FFFF - 6522

     
  For address decoding, I departed from the almost univerally used 74LS183 3-to-8 decoder chip. I used a 74LS156 dual 2 of 4 decoder. It can be wired as a 3-to-8 decoder and used like the 74LS138 to dice up the 64 KB address space into 8 8KB chunks, but it has the
advantage of having open collector outputs. Open collector outputs enabled me to "wire-or" these 8 KB pages together to easily select larger spaces - I wire-or'ed 4 of them together to select the 32 KB EPROM, and wire-or'ed three together to address 24KB of the RAM chip. The remaining 8KB line I used to select the 6522. It's a bit wasteful of address space to use 8KB for a single device that only has 4 registers, but it was simple and sufficient to my needs. 


  I had anticpated trouble getting the 6522 chip to work with the T-11. The 6522 is from the Rockwell 6500 family of chips. and expects some 6500 style synchronization to occur via its PHI2 pin. Fortunately, the T-11 was designed to work with common microprocessor support chips, and all that was required was to connect the COUT T-11 line to the 6522 PHI2 line. The 6522 chip has an IRQ line that can be used to signal the CPU that a variety of conditions have occurred, such as a timer counting down  to 0, or the shift register filling up. The T-11 supports the full PDP11 vectored interrupt architecture, but optionally can be much simpler - instead of reading vectors during an interrupt, four CPU lines can be used for four different interrupts. I connected the 6522 IRQ line to the CP0 line on the CPU. It's open collector, so I had to pull it up with a resistor. When the 6522 interrupts, software will query the 6522 to see which of 7 different interrupt events caused the interrupt.

  There are a number of configuration options available on the the T-11. They are read at startup from the address and data lines. At power on, signal BCLR selects a 74LS367 so the options can be read. When startup is complete, BCLR goes high, and the 74LS367 goes into a tri-stated condition, which prevents it from interfering with normal operation.

  The T-11 includes internal pullups on these lines, so we only need to ground the lines that need to be zero - a one will be read on the lines that aren't connected.

  Here's the options I needed...8 bit, static RAM, constant speed clock, User (not test) mode,start address 10000 (octal),standard length microcycles, normal R/W signalling. Below are the settings needed to get those options.

   Bit   Effect              Value  T-11 pins
    0 - constant clock      0     DAL 0
    1 - Longcycle            1
    2 - 7 - rsrvd
    8 - normal/delayed    0     DAL 8
    9 - Static or dyn        1
   10 - N/A              Don't Care
   11 - 8/16                    1
   12 - user/test             1
   13 - 15 Start addr        001    DAL14 and 15

   

  The T-11, like other DEC LSI11 devices, multiplexes the data bus with part of the address bus. A 74LS373 is used to separate and buffer the lines involved.


  So, given the above, I produced a schematic and soldered up a prototype using perfboard and IC sockets. That's how I usually make my other controllers. This took longer due to more chips involved. It also turned into a pain in the sitzplatz when the ROM socket I used, for some reason, refused to take solder on about half of its pins. I cleaned them, fluxed them, sanded them and begged for them to accept the solder and wires, but no go. I finally managed to mechanically attach some wires to them and then solder the connections to the wire. When complete, the board ran fine, but, due to the ROM socket issues, was very sensitive to vibration. By now I was in no mood to repeat that process, so I bit the bullet and did my first PC board design. I used Express PCB to layout the board and got a few boards made. A little pricy, but it saved a whole lot of time and aggro, so I think it was worth it. I checked and quadruple checked the layout before I sent it off, and I was pleasantly surprised when the boards worked - I figured I would at least have to run some of those green ECO wires to fix something I missed, but it wasn't required.

  So, now I've got running T-11s. I've hooked them up to some hex readouts and an HD44780 display for testing. Next thing I'm going to do is write a tiny little OS for it.

T11/6522 schematic

7 comments:

  1. That is a really need little board. Do you happen to have the MACRO-ODT ROM for the T11?

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    1. I don't have that handy. Bitsavers has the DCTEM-11 manual online, which contains the listing for the T11 evaluation system's monitor, which looks like it does some of the things that ODT would.

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  2. Thanks. I have the docs so might just need to assemble it myself. Quite tempted to build your board.

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  3. I just discovered that the T-11 existed. You'd think I would know since I started using an 11/20 in the '70's. Anyway, do you know anyone who has any of these little treasures? I think your board looks fun AND a lot smaller, quieter and lower power than a full size model. Thanks.

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  4. T-11 chips show up pretty often on Ebay, but they've sky rocketed in price over the last few years. I don't know of any other sources.

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  5. Out of curiosity did you ever write a little OS for it? I have been toying with making some kind of PDP-11ish sbc. Something like this feels like a good way to get my feet wet before tackling something like a PDP-11/HACK

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  6. I wrote about 1600 lines or so of a mini OS for it - g/OS. It's sparsely documented and there's no manual on how to use it. I plan to come back and work on it some more when I get time. It's RSX "flavored" - it has tasks, event flags, a priority based scheduler, timer service, pool. All in very rudimentary fashion. And since my T11 doesn't have any serial comms, there's no provision for command lines. But, it might be of some use to you as a reference in writing your own. If you'd like a copy, send me your email address and I'll send it to you. I'm at lee.gleason@gmail.com.

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